USB-C PD business card
- Size
- 85.6 × 54 mm
- Board
- 0.6 mm FR4, ENIG
- Finish
- Matte black, white silkscreen
- Thickness
- About 1.7 mm with parts
- MCU
- WCH CH32X035
- NFC
- NXP NT3H2111
- Fab
- JLCPCB assembly
My business card is a PCB. Plug a USB-C charger into its edge and it will light one LED for each capability the charger advertises: 5, 9, 12, 15 and 20 V, PPS and EPR, plus a 5-LED bar for the maximum wattage (15, 30, 45, 65 and 100 W). Tap it with a phone and a battery-free NFC tag opens this site.
Status: schematic done. Layout in progress: the USB side is placed and routed, the NFC coil is next. Not ordered yet, and the firmware is not started. It has not been fabricated or tested. This page will get bring-up notes and lessons learned once it has.
How it works
USB side. The card edge is shaped as a USB-C plug tongue, so a cable plugs straight into the board. Both CC lines go to a CH32X035, a small RISC-V MCU with a USB PD PHY built in. Each CC line has its own 5.1 kΩ pull-down, so a charger sees a sink and turns VBUS on before the MCU has booted. Firmware will wait for the charger's Source_Capabilities message, parse every power data object (fixed, PPS and EPR), light the matching LEDs, and then request 5 V only. The card never asks for a higher voltage.
NFC side. An NXP NT3H2111 tag sits at the edge of a spiral coil etched into the PCB. A phone's field will power the tag, which serves an NDEF record with the URL of this site, and the harvested energy will also light one LED. Nothing on this side touches the USB circuit or needs a battery.
Design decisions
- D+ and D− are left unconnected. The CH32X035's BOOT pin is PC17, which is also the USB D+ pin, and some chargers drive D+ to about 2.7 V. Connecting it could drop the MCU into its bootloader on plug-in.
- External Rd resistors. The CH32X035 cannot present its own Rd without WCH's companion chip, and the pull-downs must be there before any firmware runs.
- Coil sized to the tag. The NT3H2111 has about 50 pF of input capacitance, so resonance at 13.56 MHz needs about 2.75 µH. The coil is a 46 × 38 mm rectangle, 5 turns of 0.5 mm track with 0.3 mm gaps. Its estimated inductance is 2.30 µH, which puts it at about 14.4 MHz untuned. That is deliberately high, because a tuning capacitor can only lower the frequency: about 6.8 pF brings it to 13.56 MHz, and the board has a footprint for one. These are estimates from a coil script in the repo. Nothing is measured yet.
- Coil and electronics on opposite halves. No copper pour, traces or art inside or near the coil, and the USB-C plug shell stays at least 5 mm away.
Design files
The KiCad project is public at github.com/ulyssecrn/usb-pd-card.
Schematic
Open in KiCanvasPCB layout (in progress)
Open in KiCanvasKey parts
| Ref | Part | Role | LCSC |
|---|---|---|---|
| U1 | WCH CH32X035G8U6 | MCU with USB PD PHY | C7437027 |
| U3 | NXP NT3H2111W0FHKH | NFC tag with energy harvesting | C710403 |
| U2 | Microne ME6228A33M3G | 3.3 V LDO, SOT-23 | C487914 |
| D1 | SMF20A | VBUS TVS | C41411782 |
| D3, D4 | H7VL10B | CC line ESD | C20615787 |
| D2, D5 to D16 | KT-0603R | 13 red LEDs | C2286 |
The full BOM, with LCSC numbers for every part, is in the repo.
Credits
The PCB-edge USB-C footprint is adapted from Nicholas Johnson's flip-card (MIT). I used Koda's NFC business card as a reference for the coil geometry.